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1 ltc2844 sn2844 2844fs features descriptio u typical applicatio u 3.3v software-selectable multiprotocol transceiver dte or dce multiprotocol serial interface with db-25 connector , ltc and lt are registered trademarks of linear technology corporation. n software-selectable transceiver supports: rs232, rs449, eia530, eia530-a, v.35, v.36, x.21 n operates from single 3.3v supply with ltc2846 n tuv rheinland of north america inc. certified net1, net2 and tbr2 compliant, report no.: tbr2/051501/02 n complete dte or dce port with ltc2846 n 28-lead ssop surface mount package the ltc ? 2844 is a 4-driver/4-receiver multiprotocol trans- ceiver. the ltc2844 and ltc2846 form the core of a complete software-selectable dte or dce interface port that supports the rs232, rs449, eia530, eia530-a, v.35, v.36 or x.21 protocols. the ltc2844 operates from a 3.3v supply and supplies provided by the ltc2846. the part is available in a 28-lead ssop surface mount package. applicatio s u n data networking n csu and dsu n data routers d2 d1 ltc2844 rts dtr dsr dcd cts d3 r2 r1 r4 r3 ltc2846 ll txd scte txc rxc rxd 2 14 24 11 15 12 17 9 3 1 4 19 20 623 22 5 13 8 10 18 7 16 2844 ta01 d1 scte b scte a (113) txd b txd a (103) rxc a (115) rxc b rxd a (104) rxd b rts a (105) rts b dtr a (108) dtr b cts a (106) cts b ll a (141) sg (102) shield (101) db-25 connector txc a (114) dcd a (109) dcd b dsr a (107) dsr b d4 d2 d3 r1 r2 r3 txc b t t t t t
2 ltc2844 sn2844 2844fs order part number (note 1) supply voltage v cc ....................................................... C0.3v to 6.5v v in ..................................................................... C 0.3v to 6.5v v ee ...................................................................... C10v to 0.3v v dd ..................................................................... C 0.3v to 10v input voltage transmitters ............................ C 0.3v to (v cc + 0.3v) receivers ................................................C 18v to 18v logic pins ............................... C 0.3v to (v cc + 0.3v) output voltage transmitters .................. (v ee C 0.3v) to (v dd + 0.3v) receivers ................................. C 0.3v to (v in + 0.3v) short-circuit duration transmitter output ...................................... indefinite receiver output ........................................... indefinite v ee ................................................................... 30 sec operating temperature range ltc2844cg ............................................. 0 c to 70 c ltc2844ig ......................................... C 40 c to 85 c storage temperature range ................. C 65 c to 150 c lead temperature (soldering, 10 sec).................. 300 c ltc2844cg ltc2844ig t jmax = 125 c, q ja = 90 c/ w, q jc = 35 c/ w consult ltc marketing for parts specified with wider operating temperature ranges. the l denotes specifications which apply over the full operating tempera- ture range, otherwise specifications are at t a = 25 c. v cc = 5v, v in = 3.3v, v dd = 8v, v ee = C 7v for v.28, C 5.5v for v.10, v.11 (notes 2, 3) symbol parameter conditions min typ max units supplies i cc v cc supply current (dce mode, rs530, rs530-a, x.21 modes, no load 2.7 ma all digital pins = gnd or v in ) rs530, rs530-a, x.21 modes, full load l 95 120 ma v.28 mode, no load l 12 ma v.28 mode, full load l 12 ma no-cable mode l 600 1200 m a i ee v ee supply current (dce mode unless rs530, rs530-a, x.21 modes, no load 1.6 ma otherwise noted, all digital pins = gnd or v in ) rs530, x.21 modes, full load (dte mode) 14 ma rs530-a, full load (dte mode) 25 ma v.28 mode, no load 1 ma v.28 mode, full load 7.5 ma no-cable mode 10 m a i dd v dd supply current (dce mode, rs530, rs530-a, x.21 modes, no load 0.2 ma all digital pins = gnd or v in ) rs530, rs530-a, x.21 modes, full load 0.2 ma v.28 mode, no load 1 ma v.28 mode, full load 8 ma no-cable mode 10 m a i vin v in supply current (dce mode, all modes except no-cable mode 490 m a all digital pins = gnd or v in ) absolute axi u rati gs w ww u package/order i for atio uu w electrical characteristics 1 2 3 4 5 6 7 8 9 10 11 12 13 14 top view 28 27 26 25 24 23 22 21 20 19 18 17 16 15 v cc v dd d1 d2 d3 r1 r2 r3 d4 r4 m0 m1 m2 dce/dte v ee gnd d1 a d1 b d2 a d2 b d3/r1 a d3/r1 b r2 a r2 b r3 a r3 b d4/r4 a v in r1 d2 d1 r2 d3 g package 28-lead plastic ssop r3 d4 r4
3 ltc2844 sn2844 2844fs the l denotes specifications which apply over the full operating tempera- ture range, otherwise specifications are at t a = 25 c. v cc = 5v, v in = 3.3v, v dd = 8v, v ee = C 7v for v.28, C 5.5v for v.10, v.11 (notes 2, 3) electrical characteristics symbol parameter conditions min typ max units p d internal power dissipation (dce mode, rs530, rs530-a, x.21 modes, full load 210 mw all digital pins = gnd or v in ) v.28 mode, full load 54 mw logic inputs and outputs v ih logic input high voltage l 2v v il logic input low voltage l 0.8 v i in logic input current d1, d2, d3, d4 l 10 m a m0, m1, m2, dce = gnd l C 30 C 75 C120 m a m0, m1, m2, dce = v in l 10 m a v oh output high voltage i o = C3ma l 2.7 3 v v ol output low voltage i o = 1.6ma l 0.2 0.4 v i osr output short-circuit current 0v v o v in l 50 ma i ozr three-state output current m0 = m1 = m2 = v in , v o = 0v l C 30 C 85 C 160 m a m0 = m1 = m2 = v in , v o = v in l 10 m a v.11 driver v odo open circuit differential output voltage r l = 1.95k (figure 1) l 5v v odl loaded differential output voltage r l = 50 w (figure 1) 0.5v odo 0.67v odo v l 2v d v od change in magnitude of differential r l = 50 w (figure 1) l 0.2 v output voltage v oc common mode output voltage r l = 50 w (figure 1) l 3v d v oc change in magnitude of common mode r l = 50 w (figure 1) l 0.2 v output voltage i ss short-circuit current v out = gnd 150 ma i oz output leakage current C0.25v v o 0.25v, power off or l 1 100 m a no-cable mode or driver disabled t r , t f rise or fall time ltc2844c (figures 2, 5) l 21525ns ltc2844i (figures 2, 5) l 21535ns t plh input to output ltc2844c (figures 2, 5) l 20 40 65 ns ltc28441 (figures 2, 5) l 20 40 75 ns t phl input to output ltc2844c (figures 2, 5) l 20 40 65 ns ltc2844i (figures 2, 5) l 20 40 75 ns d t input to output difference, ? t plh C t phl ? ltc2844c (figures 2, 5) l 0312ns ltc2844i (figures 2, 5) l 0317ns t skew output to output skew (figures 2, 5) 3 ns v.11 receiver v th input threshold voltage C7v v cm 7v l C 0.2 0.2 v d v th input hysteresis C7v v cm 7v l 15 40 mv i in input current (a, b) C10v v a,b 10v l 0.66 ma r in input impedance C10v v a,b 10v l 15 30 k w t r , t f rise or fall time (figures 2, 6) 15 ns t plh input to output ltc2844c c l = 50pf (figures 2, 6) l 50 80 ns ltc2844i c l = 50pf (figures 2, 6) l 50 90 ns
4 ltc2844 sn2844 2844fs the l denotes specifications which apply over the full operating tempera- ture range, otherwise specifications are at t a = 25 c. v cc = 5v, v in = 3.3v, v dd = 8v, v ee = C 7v for v.28, C 5.5v for v.10, v.11 (notes 2, 3) electrical characteristics symbol parameter conditions min typ max units t phl input to output ltc2844c c l = 50pf (figures 2, 6) l 50 80 ns ltc2844i c l = 50pf (figures 2, 6) l 50 90 ns d t input to output difference, ? t plh C t phl ? ltc2844c c l = 50pf (figures 2, 6) l 0416ns ltc2844i c l = 50pf (figures 2, 6) l 0421ns v.10 driver v o output voltage open circuit, r l = 3.9k l 4 6v v t output voltage r l = 450 w (figure 3) l 3.6 v r l = 450 w (figure 3) 0.9v o i ss short-circuit current v o = gnd 150 ma i oz output leakage current C0.25v v o 0.25v, power off or l 0.1 100 m a no-cable mode or driver disabled t r , t f rise or fall time r l = 450 w , c l = 100pf (figures 3, 7) 2 m s t plh input to output r l = 450 w , c l = 100pf (figures 3, 7) 1 m s t phl input to output r l = 450 w , c l = 100pf (figures 3, 7) 1 m s v.10 receiver v th receiver input threshold voltage l C0.25 0.25 v d v th receiver input hysteresis l 25 50 mv i in receiver input current C10v v a 10v l 0.66 ma r in receiver input impedance C10v v a 10v l 15 30 k w t r , t f rise or fall time c l = 50pf (figures 4, 8) 15 ns t plh input to output c l = 50pf (figures 4, 8) 55 ns t phl input to output c l = 50pf (figures 4, 8) 109 ns d t input to output difference, ? t plh C t phl ? c l = 50pf (figures 4, 8) 60 ns v.28 driver v o output voltage open circuit l 10 v r l = 3k (figure 3) l 5 8.5 v i ss short-circuit current v o = gnd l 150 ma i oz output leakage current C0.25v v o 0.25v, power off or l 1 100 m a no-cable mode or driver disabled sr slew rate r l = 3k, c l = 2500pf (figures 3, 7) l 430v/ m s t plh input to output r l = 3k, c l = 2500pf (figures 3, 7) l 1.3 2.5 m s t phl input to output r l = 3k, c l = 2500pf (figures 3, 7) l 1.3 2.5 m s v.28 receiver v thl input low threshold voltage l 0.8 v v tlh input high threshold voltage l 2v d v th receiver input hysterisis l 0.1 0.3 v r in receiver input impedance C15v v a 15v l 357k w t r , t f rise or fall time c l = 50pf (figures 4, 8) 15 ns t plh input to output c l = 50pf (figures 4, 8) l 60 100 ns t phl input to output c l = 50pf (figures 4, 8) l 150 500 ns
5 ltc2844 sn2844 2844fs data rate (kbd) i cc (ma) 125 120 115 110 105 100 95 90 2844 g01 10 100 1000 10000 data rate (kbd) 10 i ee (ma) 26 24 22 20 18 16 14 30 100 2844 g02 20 40 50 60 70 80 10 30 100 20 40 50 60 70 80 data rate (kbd) i dd (ma) 10 9 8 7 6 5 4 2844 g03 temperature ( c) ?0 i cc (ma) 105 100 95 90 85 80 20 60 2844 g04 20 0 40 80 100 40 20 60 20 0 40 80 100 40 20 60 20 0 40 80 100 temperature ( c) i ee (ma) 2844 g05 23.5 25.4 25.3 25.2 25.1 25.0 24.9 24.8 24.7 24.6 24.5 temperature ( c) i dd (ma) 2844 g06 8.20 8.15 8.10 8.05 8.00 7.95 7.90 7.85 7.80 t a = 25 c t a = 25 c t a = 25 c note 1: absolute maximum ratings are those values beyond which the life of a device may be impaired. note 2: all currents into device pins are positive; all currents out of device are negative. all voltages are referenced to device ground unless otherwise specified. note 3: all typicals are given for v cc = 5v, v in = 3.3v, v dd = 8v, v ee = C 7v for v.28, C 5.5v for v.10, v.11 and t a = 25 c. electrical characteristics typical perfor a ce characteristics uw rs530, x.21 in dce mode (three v.11 drivers with full load) i cc vs data rate v.28 in dce mode (three v.28 drivers with full load) i dd vs data rate rs530-a in dte mode (two v.10 drivers with full load) i ee vs data rate rs530, x.21 in dce mode (three v.11 drivers with full load) i cc vs temperature v.28 in dce mode (three v.28 drivers with full load) i dd vs temperature rs530-a in dte mode (two v.10 drivers with full load) i ee vs temperature
6 ltc2844 sn2844 2844fs uu u pi fu ctio s v cc (pin 1): positive supply for the transceivers. connect to v cc pin 8 on ltc2846 or to 5v supply. connect a 1 m f capacitor to ground. v dd (pin 2): positive supply voltage for v.28. connect to v dd pin 7 on ltc2846 or 8v supply. connect a 1 m f capacitor to ground. d1 (pin 3): ttl level driver 1 input. d2 (pin 4): ttl level driver 2 input. d3 (pin 5): ttl level driver 3 input. r1 (pin 6): cmos level receiver 1 output. receiver outputs have a weak pull up to v in when high impedance. r2 (pin 7): cmos level receiver 2 output. r3 (pin 8): cmos level receiver 3 output. d4 (pin 9): ttl level driver 4 input. r4 (pin 10): cmos level receiver 4 output. m0 (pin 11): ttl level mode select input 0. mode select inputs pull up to v in . m1 (pin 12): ttl level mode select input 1. m2 (pin 13): ttl level mode select input 2. dce/dte (pin 14): ttl level mode select input. v in (pin 15): positive supply for the receiver outputs. 3v v in 3.6v. connect a 1 m f capacitor to ground. d4/r4 a (pin 16): receiver 4 inverting input and driver 4 inverting output. r3 b (pin 17): receiver 3 noninverting input. r3 a (pin 18): receiver 3 inverting input. r2 b (pin 19): receiver 2 noninverting input. r2 a (pin 20): receiver 2 inverting input. d3/r1 b (pin 21): receiver 1 noninverting input and driver 3 noninverting output. d3/r1 a (pin 22): receiver 1 inverting input and driver 3 inverting output. d2 b (pin 23): driver 2 noninverting output. d2 a (pin 24): driver 2 inverting output. d1 b (pin 25): driver 1 noninverting output. d1 a (pin 26): driver 1 inverting output. gnd (pin 27): ground. v ee (pin 28): negative supply voltage. connect to v ee pin 31 on ltc2846 or to C 7v supply. connect a 1 m f capacitor to ground.
7 ltc2844 sn2844 2844fs figure 3. v.10/v.28 driver test circuit figure 4. v.10/v.28 receiver test circuit a d 2844 f04 c l r a a d 2844 f03 r l c l test circuits block diagra w figure 1. v.11 driver test circuit a b a r b 2844 f02 r l 100 w c l 100pf c l 100pf c l a b 2844 f01 v od v oc r l r l figure 2. v.11 driver/receiver ac test circuit mode selection logic r2 r2a r2b r3 r3a r3b s3 20k 20k 20k 20k s3 10k 6k d3/r1 b 10k 10k 10k d3 dce/dte r1 d3 r1 6k 20k 20k s3 10k 10k 2844 bd 6k 7 8 5 6 20 19 d2 d2a d2b d2 4 24 23 d1 d1a d1b d1 3 v dd 2 v cc 1 gnd 27 v ee 28 26 25 18 17 21 s3 20k 10k 6k d4/r4 a d4 r4 d4 9 10 m0 11 m1 12 m2 13 16 v in 15 14 r2 r3 r4 d3/r1 a 25
8 ltc2844 sn2844 2844fs ode selectio w u (note 2) (note 2) (note 2) (note 2) (note 3) (note 3) (note 3) r1 r2 r3 r4a r1 r2 r4 ababab r3 v.11 v.11 v.11 v.11 v.11 v.11 30k cmos cmos z v.11 v.11 v.10 30k v.11 v.11 30k cmos cmos z v.11 v.11 v.11 v.11 v.11 v.11 30k cmos cmos z v.11 v.11 v.11 v.11 v.11 v.11 30k cmos cmos z v.28 30k v.28 30k v.28 30k 30k cmos cmos z v.11 v.11 v.11 v.11 v.11 v.11 30k cmos cmos z v.28 30k v.28 30k v.28 30k 30k cmos cmos z 30k 30k 30k 30k 30k 30k 30k z z z 30k 30k v.11 v.11 v.11 v.11 v.10 z cmos cmos 30k 30k v.10 30k v.11 v.11 v.10 z cmos cmos 30k 30k v.11 v.11 v.11 v.11 v.10 z cmos cmos 30k 30k v.11 v.11 v.11 v.11 v.10 z cmos cmos 30k 30k v.28 30k v.28 30k v.28 z cmos cmos 30k 30k v.11 v.11 v.11 v.11 v.10 z cmos cmos 30k 30k v.28 30k v.28 30k v.28 z cmos cmos 30k 30k 30k 30k 30k 30k 30k z z z (note 1) (note 1) (note 1) mode name m2 m1 m0 dce d1 d3 d4 d1 d2 d3 d4a /dte d2 ababab not used (default v.11) 0000ttlxttlv.11v.11v.11v.11zzv.10 rs530a 0010ttlxttlv.11v.11v.10zzzv.10 rs530 0100ttlxttlv.11v.11v.11v.11zzv.10 x.21 0110ttlxttlv.11v.11v.11v.11zzv.10 v.35 1000ttlxttlv.28zv.28zzzv.28 rs449/v.36 1010ttlxttlv.11v.11v.11v.11zzv.10 v.28/rs232 1100ttlxttlv.28zv.28zzzv.28 no cable 1110xxxzzzzzzz not used (default v.11) 0001ttlttlxv.11v.11v.11v.11v.11v.11z rs530a 0011ttlttlxv.11v.11v.10zv.11v.11z rs530 0101ttlttlxv.11v.11v.11v.11v.11v.11z x.21 0111ttlttlxv.11v.11v.11v.11v.11v.11z v.35 1001ttlttlxv.28zv.28zv.28zz rs449/v.36 1011ttlttlxv.11v.11v.11v.11v.11v.11z v.28/rs232 1101ttlttlxv.28zv.28zv.28zz no cable 1111xxxzzzzzzz mode name m2 m1 m0 dce /dte not used (default v.11) 0 0 0 0 rs530a 0 0 1 0 rs530 0 1 0 0 x.21 0 1 1 0 v.35 1 0 0 0 rs449/v.36 1 0 1 0 v.28/rs232 1 1 0 0 no cable 1 1 1 0 not used (default v.11) 0 0 0 1 rs530a 0 0 1 1 rs530 0 1 0 1 x.21 0 1 1 1 v.35 1 0 0 1 rs449/v.36 1 0 1 1 v.28/rs232 1 1 0 1 no cable 1 1 1 1 note 1: driver inputs are ttl level compatible. note 2: unused receiver inputs are terminated with 30k to ground. note 3: receiver outputs are cmos level compatible and have a weak pull-up to v in when z.
9 ltc2844 sn2844 2844fs figure 7. v.10, v.28 driver propagation delays figure 6. v.11, v.35 receiver propagation delays figure 8. v.10, v.28 receiver propagation delays 3v 0v 1.5v 0v ?v 3v 1.5v 0v 3v ?v t phl t f v o ? o d a t plh t r 2844 f07 v od2 ? od2 0v 1.65v 0v 1.65v t plh v oh v ol b ?a r t phl 2844 f06 f = 1mhz : t r 10ns : t f 10ns input output v ih v il receiver threshold 1.65v receiver threshold t phl v oh v ol a r t plh 2844 f08 1.65v 3v 1.5v 1.5v 50% 10% 90% t plh t r 0v v o v o ? o d b ?a a b t phl t skew t skew 2844 f05 1/2 v o f = 1mhz : t r 10ns : t f 10ns v diff = v(a) ?v(b) 50% 10% 90% t f figure 5. v.11, v.35 driver propagation delays switchi g ti e wavefor s uw w
10 ltc2844 sn2844 2844fs overview the ltc2846/ltc2844 form the core of a complete soft- ware-selectable dte or dce interface port that supports the rs232, rs449, eia530, eia530-a, v.35, v.36 or x.21 protocols. a complete dce-to-dte interface operating in eia530 mode is shown in figure 9. the ltc2846 of each port is used to generate the clock and data signals. the ltc2844 is used to generate the control signals along with ll (local loop-back). cable termination is used only for the clock and data signals. the control signals do not need any external resistors. figure 9. complete multiprotocol interface in eia530 mode applicatio n s i n for m atio n wu u u ltc2846 dce dte ltc2846 d3 r1 103 w 103 w 103 w r3 txd scte txc rxc rxd 103 w r2 103 w r3 r1 d2 d1 r2 d3 2844 f09 ltc2844 d4 r1 r2 r3 ll txc rxc rxd serial controller scte txd ltc2844 txd scte txc rxc rxd rts dtr dcd dsr cts ll rts dtr dcd dsr cts rts dtr dcd dsr cts ll serial controller r4 r4 d3 d2 d1 r2 r1 r3 d2 d1 d4 d3 d2 d1
11 ltc2844 sn2844 2844fs mode selection the interface protocol is selected using the mode select pins m0, m1 and m2 (see the mode selection table). for example, if the port is configured as a v.35 interface, the mode selection pins should be m2 = 1, m1 = 0, m0 = 0. for the control signals, the drivers and receivers will operate in v.28 (rs232) electrical mode. for the clock and data signals, the drivers and receivers will operate in v.35 electrical mode. the dce/dte pin will configure the port for dce mode when high, and dte when low. the interface protocol may be selected simply by plug- ging the appropriate interface cable into the connector. the mode pins are routed to the connector and are left unconnected (1) or wired to ground (0) in the cable as shown in figure 10. the internal pull-up current sources will ensure a binary 1 when a pin is left unconnected and that the ltc2846/ ltc2844 enter the no-cable mode when the cable is removed. in the no-cable mode the ltc2846/ltc2844 supply current drops to less than 900 m a and all driver outputs are forced into a high impedance state. the mode selection may also be accomplished by using jumpers to connect the mode pins to ground or v in . figure 10. single port dce v.35 mode selection in the cable applicatio n s i n for m atio n wu u u nc nc cable 2844 f10 15 16 18 19 ltc2846 ltc2844 connector 14 13 12 11 (data) m0 m1 m2 dce/dte dce/dte m2 m1 m0 (data)
12 ltc2844 sn2844 2844fs cable termination traditional implementations have included switching resistors with expensive relays, or required the user to change termination modules every time the interface standard has changed. custom cables have been used with the termination in the cable head or separate termina- tions are built on the board and a custom cable routes the signals to the appropriate termination. switching the termination with fets is difficult because the fets must remain off even though the signal voltage is beyond the supply voltage for the fet drivers or the power is off. using the ltc2846/ltc2844 solves the cable termination switching problem. via software control, appropriate ter- mination for the v.10 (rs423), v.11 (rs422), v.28 (rs232) and v.35 electrical protocols is chosen. v.10 (rs423) interface a typical v.10 unbalanced interface is shown in figure 11. a v.10 single-ended generator output a with ground c is connected to a differential receiver with inputs a ' con- nected to a, and input c ' connected to the signal return ground c. usually, no cable termination is required for v.10 interfaces, but the receiver inputs must be compliant with the impedance curve shown in figure 12. the v.10 receiver configuration in the ltc2844 is shown in figure 13. in v.10 mode switch s3 inside the ltc2844 is turned off.the noninverting input is disconnected inside the ltc2844 receiver and connected to ground. the cable termination is then the 30k input impedance to ground of the ltc2844 v.10 receiver. i z v z 10v ?.25ma 3.25ma ?v 3v 10v 2844 f12 figure 12. v.10 receiver input impedance figure 11. typical v.10 interface figure 13. v.10 receiver configuration aa ' cc ' generator balanced interconnecting cable load cable termination receiver 2844 f11 r5 20k ltc2844 receiver 2844 f13 a ' b ' c ' r8 6k s3 r6 10k r7 10k gnd r4 20k applicatio n s i n for m atio n wu u u
13 ltc2844 sn2844 2844fs v.11 (rs422) interface a typical v.11 balanced interface is shown in figure 14. a v.11 differential generator with outputs a and b with ground c is connected to a differential receiver with ground c ' , inputs a ' connected to a, b ' connected to b. the v.11 interface has a differential termination at the receiver end that has a minimum value of 100 w . the termination resistor is optional in the v.11 specification, but for the high speed clock and data lines, the termination is required to prevent reflections from corrupting the data. the receiver inputs must also be compliant with the imped- ance curve shown in figure 12. in v.11 mode, all switches are off except s1 of the ltc2846s receivers which connects a 103 w differential termination impedance to the cable as shown in figure 15 1 . the ltc2844 only handles control signals, so no termination other than its v.11 receivers 30k input imped- ance is necessary. figure 15. v.11 receiver configuration aa ' b c b ' c ' generator balanced interconnecting cable load cable termination receiver 100 w min 2844 f14 v.28 (rs232) interface a typical v.28 unbalanced interface is shown in figure 16. a v.28 single-ended generator output a with ground c is connected to a single-ended receiver with input a ' con- nected to a, ground c ' connected via the signal return ground c. in v.28 mode all switches are off except s3 inside the ltc2846/ltc2844 which connects a 6k (r8) impedance to ground in parallel with 20k (r5) plus 10k (r6) for a combined impedance of 5k as shown in figure 17. the noninverting input is disconnected inside the ltc2846/ ltc2844 receiver and connected to a ttl level reference voltage for a 1.4v receiver trip point. aa ' cc ' generator balanced interconnecting cable load cable termination receiver 2844 f16 figure 14. typical v.11 interface r5 20k ltc2844 receiver 2844 f17 a ' b ' c ' r8 6k s3 r6 10k r7 10k gnd r4 20k figure 17. v.28 receiver configuration figure 16. typical v.28 interface applicatio n s i n for m atio n wu u u 1 actually, there is no switch s1 in receivers r2 and r3. however, for simplicity, all termination networks on the ltc2846 can be treated identically if it is assumed that an s1 switch exists and is always closed on the r2 and r3 receivers. r3 124 w r5 20k ltc2846 receiver 2844 f15 a ' b ' c ' r1 51.5 w r8 6k s2 s3 r2 51.5 w r6 10k r7 10k gnd r4 20k s1
14 ltc2844 sn2844 2844fs a a ' b c b ' c ' generator balanced interconnecting cable load cable termination receiver 2844 f18 50 w 125 w 50 w 50 w 125 w 50 w figure 18. typical v.35 interface figure 19. v.35 receiver configuration v.35 interface a typical v.35 balanced interface is shown in figure 18. a v.35 differential generator with outputs a and b with ground c is connected to a differential receiver with ground c ' , inputs a ' connected to a, b ' connected to b. the v.35 interface requires a t or delta network termination at the receiver end and the generator end. the receiver differential impedance measured at the connector must be 100 w 10 w , and the impedance between shorted termi- nals (a ' and b ' ) and ground c ' must be 150 w 15 w . in v.35 mode, both switches s1 and s2 inside the ltc2846 are on, connecting the t network impedance as shown in figure 19. the 30k input impedance of the receiver is placed in parallel with the t network termination, but does not affect the overall input impedance significantly. the generator differential impedance must be 50 w to 150 w and the impedance between shorted terminals (a and b) and ground c must be 150 w 15 w . for the generator termination, switches s1 and s2 are both on as shown in figure 20. no-cable mode the no-cable mode (m0 = m1 = m2 = 1) is intended for the case when the cable is disconnected from the connector. the bias circuitry, drivers and receivers are turned off, the driver outputs are forced into a high impedance state, and the supply current drops to less than 600 m a. ltc2846 supplies the ltc2846 uses an internal capacitive charge pump to generate v dd and v ee as shown in figure 21. a voltage doubler generates about 8v on v dd and a voltage inverter generates about C 7.5v for v ee . three 1 m f surface mounted tantalum or ceramic capacitors are required for c1, c2 and c3. the v ee capacitor c4 should be a minimum of 3.3 m f. all capacitors are 16v and should be placed as close as possible to the ltc2846 to reduce emi. the ltc2846 has an internal boost switching regulator which generates a 5v output from the 3.3v supply as shown in figure 22. the 5v v cc supplies its internal charge pump and transceivers as well as its companion chip. applicatio n s i n for m atio n wu u u figure 20. v.35 driver v.35 driver a b c 51.5 w s2 s1 2844 f20 51.5 w ltc2846 124 w r3 124 w r5 20k ltc2846 receiver 2844 f19 a ' b ' c ' r1 51.5 w r8 6k s2 s3 r2 51.5 w r6 10k r7 10k gnd r4 20k s1 33 32 31 30 2844 f21 7 6 5 8 c3 1 m f c5 10 m f 5v c1 1 m f c2 1 m f c4 3.3 m f ltc2846 v dd c1 + c1 v cc c2 + c2 v ee gnd + figure 21. charge pump
15 ltc2844 sn2844 2844fs mode, the txd signal is routed to pins 2 and 14 via driver 1 in the ltc2846. in dce mode, driver 1 now routes the rxd signal to pins 2 and 14. multiprotocol interface with rl, ll, tm and a db-25 connector if the rl, ll and tm signals are implemented, there are not enough drivers and receivers available in the ltc2846/ ltc2844. in figure 25, the required control signals are handled by the ltc2845. the ltc2845 has an additional single-ended driver/receiver pair that can handle two more optional control signals such as tm and ll. cable-selectable multiprotocol interface a cable-selectable multiprotocol dte/dce interface is shown in figure 26. the select lines m0, m1 and dce/dte are brought out to the connector. the mode is selected by the cable by wiring m0 (connector pin 18) and m1 (con- nector pin 21) and dce/dte (connector pin 25) to ground (connector pin 7) or letting them float. if m0, m1 or dce/ dte is floating, internal pull-up current sources will pull the signals to v in . the select bit m2 is floating and therefore, internally pulled high. when the cable is pulled out, the interface will go into the no-cable mode. compliance testing the ltc2846/ltc2844 chipset has been tested by tuv rheinland of north america inc. and passed the net1, net2 and tbr2 requirements. copies of the test report are available from ltc or tuv rheinland of north america inc. the title of the report is test report no. tbr2/051501/02 the address of tuv rheinland of north america inc. is: receiver fail-safe all ltc2846/ltc2844 receivers feature fail-safe opera- tion in all modes. if the receiver inputs are left floating or shorted together by a termination resistor, the receiver output will always be forced to a logic high. dte vs dce operation the dce/dte pin acts as an enable for driver 3/receiver 1 in the ltc2846, and driver 3/receiver 1 and receiver 4/ driver 4 in the ltc2844. the ltc2846/ltc2844 can be configured for either dte or dce operation in one of two ways: a dedicated dte or dce port with a connector of appropriate gender or a port with one connector that can be configured for dte or dce operation by rerouting the signals to the ltc2846/ltc2844 using a dedicated dte cable or dedicated dce cable. a dedicated dte port using a db-25 male connector is shown in figure 23. the interface mode is selected by logic outputs from the controller or from jumpers to either v in or gnd on the mode select pins. a port with one db-25 connector, but can be configured for either dte or dce operation is shown in figure 24. the configuration requires separate cables for proper signal routing in dte or dce operation. for example, in dte applicatio n s i n for m atio n wu u u figure 22. boost switching regulator gnd v in sw shdn fb v in 3.3v 4 35 2844 f22 d1 l1 5.6 h 2, 34 r1 13k boost switching regulator c5 10 m f c6 10 f r2 4.3k v cc 5v 480ma c1,c2: taiyo yuden x5r jmk316bj106ml d1: on semiconductor mbr0520 l1: sumida cr43-5r6 shdn 336 tuv rheinland of north america inc. 1775, old highway 8 nw, suite 107 st. paul, mn 55112 tel. (651) 639-0775 fax (651) 639-0873
16 ltc2844 sn2844 2844fs figure 23. controller-selectable multiprotocol dte port with db-25 connector typical applicatio s u d2 d1 ltc2844 rts dtr dsr dcd cts d3 r2 r1 r4 r3 ltc2846 ll txd scte txc rxc rxd m0 m1 m2 dce/dte v cc v dd v ee gnd 2 14 24 11 15 12 17 9 3 1 4 19 20 8 23 10 6 22 5 13 18 7 16 2844 f23 c2 1 f r1 13k c1 1 f c6 10 f c3 1 f c4 3.3 f scte b rts a (105) rts b dtr a (108) dtr b cts a (106) cts b ll a (141) sg shield db-25 male connector dcd a (109) dcd b dsr a (107) dsr b d4 v cc 5v shdn v in 3.3v charge pump boost switching regulator l1 5.6 h + 33 7 35 4 36 d1 mbr0520 3 5 6 8 9 10 11 12 13 14 15 16 18 19 1 2 3 4 5 6 7 8 10 9 v in 15 v in 3.3v 16 17 18 19 20 21 22 23 24 25 32 31 30 29 28 27 26 25 24 23 22 21 20 17 v in 3.3v 26 27 28 c5 10 f c9 1 f c7 1 f c8 1 f m0 m1 m2 dce/dte m0 m1 m2 11 12 13 14 d1 d2 d3 r1 r2 r3 txd a (103) txd b txc a (114) rxc a (115) rxd a (104) txc b rxc b rxd b scte a (113) t t t t t c10 1 f r2 4.3k v cc 5v
17 ltc2844 sn2844 2844fs figure 24. controller-selectable multiprotocol dte/dce port with db-25 connector typical applicatio s u d2 d1 ltc2844 d3 r2 r1 r4 r3 ltc2846 m0 m1 m2 dce/dte v cc v dd v ee gnd 2844 f25 c2 1 f r1 13k c1 1 f c6 10 f c3 1 f c4 3.3 f d4 v cc 5v shdn v in 3.3v charge pump boost switching regulator l1 5.6 h + 33 7 35 4 36 d1 mbr0520 3 5 6 8 9 10 11 12 13 14 15 16 18 19 1 2 3 4 5 6 7 8 10 9 dce/dte v in 15 v in 3.3v 16 17 18 19 20 21 22 23 24 25 32 31 30 29 28 27 26 25 24 23 22 21 20 26 27 28 c5 10 f c9 1 f c7 1 f c8 1 f m0 m1 m2 dce/dte m0 m1 m2 11 12 13 14 d1 d2 d3 r1 r2 r3 t t t t t c10 1 f r2 4.3k v cc 5v dte_txd/dce_rxd dte_scte/dce_rxc dte_txc/dce_txc dte_rxc/dce_scte dte_rxd/dce_txd dte_rts/dce_cts dte_dtr/dce_dsr dte_dcd/dce_dcd dte_dsr/dce_dtr dte_cts/dce_rts dte_ll/dce_ll 2 14 24 11 15 12 17 9 3 1 4 19 20 8 23 10 6 22 5 13 18 7 16 scte b rts a rts b dtr a dtr b cts a cts b dsr a dsr b cts a cts b ll a sg shield db-25 connector dcd a dcd b dsr a dsr b rts a rts b ll a dcd a dcd b dtr a dtr b txd a txd b txc a rxc a rxd a txc b rxc b rxd b txc a scte a txd a txc b scte b txd b scte a rxc b rxd a dte dce rxd b rxc a 17 v in 3.3v
18 ltc2844 sn2844 2844fs figure 25. controller-selectable multiprotocol dte/dce port with rl, ll, tm and db-25 connector typical applicatio s u d2 d1 ltc2845 dte_rts/dce_cts dte_dtr/dce_dsr dte_dsr/dce_dtr dte_dcd/dce_dcd dte_cts/dce_rts d3 r2 r1 r4 r3 ltc2846 dte_ll/dce_ri dte_ri/dce_ll dte_tm/dce_rl dte_rl/dce_tm dte_txd/dce_rxd dte_scte/dce_rxc dte_txc/dce_txc dte_rxc/dce_scte dte_rxd/dce_txd m0 m1 m2 dce/dte v cc v dd v ee gnd 2844 f26 c2 1 f r1 13k c1 1 f c6 10 f c3 1 f c4 3.3 f d4 v cc 5v shdn v in 3.3v charge pump boost switching regulator l1 5.6 h + 33 7 35 4 36 d1 mbr0520 3 5 6 8 9 10 11 12 13 14 15 16 18 19 1, 19 2 3 4 5 6 7 8 10 9 d5 18 dce/dte v in d4enb r4en 20 15 16 nc v in 3.3v 23 r5 17 22 21 25 24 26 27 28 29 30 31 32 33 32 31 30 29 28 27 26 25 24 23 22 21 20 34 35 36 c5 10 f c9 1 f c7 1 f c8 1 f m0 m1 m2 dce/dte m0 m1 m2 11 12 13 14 d1 d2 d3 r1 r2 r3 t t t t t c10 1 f r2 4.3k v cc 5v 18 * *optional 21 25 ll ll rl rl tm tm ri ri 2 14 24 11 15 12 17 9 3 1 4 19 20 8 23 10 6 22 5 13 7 16 txd a txd b scte a scte b rxd a rxd b rxc a rxc b rxc a rxc b rxd a rxd b rts a rts b dtr a dtr b cts a cts b dsr a dsr b cts a cts b sg shield db-25 connector txc a txc b scte a scte b txd a txd b txc a txc b dcd a dcd b dsr a dsr b rts a rts b dcd a dcd b dtr a dtr b dte dce 17 v in 3.3v
19 ltc2844 sn2844 2844fs figure 26. cable-selectable multiprotocol dte/dce port with db-25 connector typical applicatio s u d2 d1 ltc2844 dte_rts/dce_cts dte_dtr/dce_dsr dte_dsr/dce_dtr dte_dcd/dce_dcd dte_cts/dce_rts d3 r2 r1 r4 r3 ltc2846 dte_txd/dce_rxd dte_scte/dce_rxc dte_txc/dce_txc dte_rxc/dce_scte dte_rxd/dce_txd m0 m1 m2 dce/dte v cc v dd v ee gnd 2844 f27 c2 1 f r1 13k c1 1 f c6 10 f c3 1 f c4 3.3 f d4 v cc 5v shdn v in 3.3v charge pump boost switching regulator l1 5.6 h + 33 7 35 4 36 d1 mbr0520 3 5 6 8 9 10 11 12 13 14 15 16 18 19 nc 1 2 3 4 5 6 7 8 10 9 nc v in 15 v in 3.3v 16 17 18 19 20 21 22 23 24 25 32 31 30 29 28 27 26 25 24 23 22 21 20 26 27 28 c5 10 f c9 1 f c7 1 f c8 1 f m0 m1 m2 dce/dte 11 12 13 14 d1 d2 d3 r1 r2 r3 t t t t t c10 1 f r2 4.3k v cc 5v 2 14 24 11 15 12 17 9 3 1 25 21 18 4 19 20 8 23 10 6 22 5 13 7 16 rxd a rxd b rxc a rxc b rxc a rxc b rxd a rxd b rts a rts b dtr a dtr b cts a cts b dsr a dsr b cts a cts b sg shield dce/dte m1 m0 db-25 connector txc a txc b scte a scte b txd a txd b txc a txc b dcd a dcd b dsr a dsr b rts a rts b dcd a dcd b dtr a dtr b dte dce mode v.35 rs449, v.36 rs232 pin 18 pin 7 nc pin 7 pin 21 pin 7 pin 7 nc cable wiring for mode selection mode pin 25 dte pin 7 dce nc cable wiring for dte/dce selection txd a txd b scte a scte b 17 v in 3.3v information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
20 ltc2844 sn2844 2844fs lt/tp 0503 1k ? printed in usa ? linear technology corporation 2002 related parts part number description comments ltc1321 dual rs232/rs485 transceiver two rs232 driver/receiver pairs or two rs485 driver/receiver pairs ltc1334 single 5v rs232/rs485 multiprotocol transceiver two rs232 driver/receiver or four rs232 driver/receiver pairs ltc1343 software-selectable multiprotocol transceiver 4-driver/4-receiver for data and clock signals ltc1344a software-selectable cable terminator perfect for terminating the ltc1543 (not needed with ltc1546) ltc1345 single supply v.35 transceiver 3-driver/3-receiver for data and clock signals ltc1346a dual supply v.35 transceiver 3-driver/3-receiver for data and clock signals ltc1543 software-selectable multiprotocol transceiver terminated with ltc1344a for data and clock signals, companion to ltc1544 or ltc1545 for control signals ltc1544 software-selectable multiprotocol transceiver companion to ltc1546 or ltc1543 for control signals including ll ltc1545 software-selectable multiprotocol transceiver 5-driver/5-receiver companion to ltc1546 or ltc1543 for control signals including ll, tm and rl ltc1546 software-selectable multiprotocol transceiver 3-driver/3-receiver with termination for data and clock signals ltc2845 3.3v software-selectable multiprotocol transceiver 3.3v supply, 5-driver/5-receiver companion to ltc2846 for control signals including ll, tm and rl ltc2846 3.3v software-selectable multiprotocol transceiver 3.3v supply, 3-driver/3-receiver with termination for data and clock signals, generates the required 5v and 8v supplies for ltc2846 and companion parts linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 l fax: (408) 434-0507 l www.linear.com u package descriptio g package 28-lead plastic ssop (5.3mm) (reference ltc dwg # 05-08-1640) g28 ssop 0802 0.09 ?0.25 (.0035 ?.010) 0 ?8 0.55 ?0.95 (.022 ?.037) 5.00 ?5.60** (.197 ?.221) 7.40 ?8.20 (.291 ?.323) 1234 5 6 7 8 9 10 11 12 14 13 9.90 ?10.50* (.390 ?.413) 25 26 22 21 20 19 18 17 16 15 23 24 27 28 2.0 (.079) 0.05 (.002) 0.65 (.0256) bsc 0.22 ?0.38 (.009 ?.015) millimeters (inches) dimensions do not include mold flash. mold flash shall not exceed .152mm (.006") per side dimensions do not include interlead flash. interlead flash shall not exceed .254mm (.010") per side * ** note: 1. controlling dimension: millimeters 2. dimensions are in 3. drawing not to scale 0.42 0.03 0.65 bsc 5.3 ?5.7 7.8 ?8.2 recommended solder pad layout 1.25 0.12

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